Location-Aware Caching Mechanism for minimizing performance degradation induced by inefficient inter-chiplet data path
September 17, 2026
Chiplet Technical Papers
Predicting Cure Evolution and Thermal Endurance of a Highly Filled Epoxy Underfill for Advanced Packaging
September 15, 2026
A Unified Interconnection Network for Chiplet-Based Scaling of the BrainScaleS Neuromorphic System
September 15, 2026
Fengshui: Demystifying Chiplet Ecosystem and Bespoke Neural Network Accelerator Codesign
September 11, 2026
Hardware Trojan Threats to Multi-Chiplet Photonic Neural Network Accelerators
September 9, 2026
Mapping Dynamic, Hierarchical Quantum Circuits
September 9, 2026
Chiplet-Based Techniques for Scalable and Memory-Aware Multiscalar Multiplication on Hardware Platforms
September 7, 2026
A Time-Encoded Analog Photonic Interposer for Energy-Efficient Integration of Analog Vision Sensors and Analog Accelerators
September 7, 2026
Self-Activated Direct Bonding with a Highly Polar Atomic-Layer-Deposited Film for 3D Integration
September 4, 2026
FLINT: Efficiently Leveraging High Bandwidth Flash for Capacity-Scalable LLM Inference Acceleration
September 2, 2026
Beacon: LLM Multi-Agent Driven Hardware Design Space Exploration for Heterogeneous Multi-Chiplet Deep Learning Accelerators
September 1, 2026
CHIPSMORE: Compute-in-Interconnect and -Memory Chiplets for Multi-Mode Multi-Request LLM Inference Acceleration
September 1, 2026
ECO-CHIP: Estimation of Carbon Footprint of Chiplet-based Architectures for Sustainable VLSI
August 31, 2026
Generative Design of Liquid-Cooling Channels for Thermal Management of 2.5D and 3D Integrated Advanced Packaging
August 31, 2026
Thermal Tuning Overhead in Wafer-Scale Optical Interconnects for LLM MoE Training: A Cross-Layer Analysis and Ferroelectric-Based Mitigation
August 27, 2026
An Open-Source Benchmark Suite of 3D-IC Testcases
August 27, 2026
IC-ThermBench: An Open, Progressive Benchmark for Generalizable 2.5D/3D-IC Thermal Learning
August 26, 2026
Architecting the Next Generation of Asynchronous, Distributed GPUs for the AI Era
August 25, 2026
To Scale Up or To Scale Out: Evaluating Space-Time Costs of Compiled Logical Circuits on Modular Superconducting Quantum Processors
August 24, 2026
HYDRA: A Heterogeneous Chiplet DSE Framework for Serving Dynamic Hybrid LLM Workloads
August 21, 2026
