Chiplet Technical Library

AI-Driven Thermal Mapping and Management in 3D Integrated Photonic Circuits

By Liton Kumar Biswas, University of Florida

July 16, 2026

CLIP-3D: Closed-Loop Evaluation of Performance and Physical Constraints for 3D ICs

By Shuo Ren, Chinese University of Hong Kong

July 16, 2026

StreamDQ: Near-Memory Weight DeQuantization in Custom HBM for Scalable AI Inference Acceleration

By Minki Jeong, SK Hynix

July 15, 2026

HCRMap: Pressure-Aware Hot-Expert Residency Mapping for 3.5D MoE Chiplet Inference

By Yongqin Zhang, Nanjing Vocational College of Information Technology

July 14, 2026

A Chiplet Interface Model for System-Level PPA Exploration

By Austin Rovinski, New York University

July 13, 2026

Zero trust in silicon: The new security imperative for chiplet-based 3D ICs

By Tova Levy (Siemens) & Chris Jones (Crypto Quantique)

July 2, 2026

Beyond the data pipe: Why connectivity IP is now the system-critical layer in every 3D IC

By Tova Levy (Siemens EDA) & Archana Cheruliyil (Qualcomm)

June 25, 2026

An Automated Interconnect Modeling Framework for Rapid Cryptolet Design Space Exploration

By Austin Rovinski (NYU)

June 24, 2026

THz/RF Corridors as a General in-package Fabric For Chiplets, HBM, and High-speed Die-die Interconnect

By Socionext

April 14, 2026

In-Field Monitoring of Chiplets via ML-Driven On-Die Telemetry

By ProteanTecs

April 14, 2026

Chiplets for Automotive, Industrial, and Aerospace Applications

By Fraunhofer IIS

March 27, 2026

Designing the Future Today: AI-Driven Multi-Die Design

By Synopsys