Chiplet Technical Library

Hardware Design and Security in the Era of Chiplets and LLMs

By Johann Knechtel, NYU Abu Dhabi

August 6, 2026

DICE: Detailed Inter-Chiplet End-to-End PHY Modeling for Accurate Chiplet Simulation

By Rashid Aligholipour, Uppsala University

July 28, 2026

APEX: an Adaptive Photonic-Electronic Chiplet Interconnection Architecture for DNN Inference

By Jingyi Chen, University of Science and Technology of China

July 24, 2026

Formal Foundations for Known Good Reliable Die Screening in Chiplet-Based AI Systems-on-Chip

By Prashanthi Metku, Qualcomm Technologies, Inc.

July 23, 2026

What's New in UALink? Technical Deep Dive into the Latest UALink Specifications

By Derek Williams (AMD), Dave Brown (AMD), Justin King (AMD), Arun Satyanarayana (Google) and Rob Pelt (AMD)

August 6, 2026

2026 DRAM and Advanced Packaging Master Class

By Applied Materials

July 30, 2026

Chiplets, RISC-V, and Europe's AI Silicon Ambition

By Nandan Nayampally (Baya Systems) & Cesc Guim (Openchip)

July 29, 2026

Driving the Future of Automotive Compute with UCIe

By Bala Chavali, AMD & Ericles Sousa, Cadence

July 27, 2026

THz/RF Corridors as a General in-package Fabric For Chiplets, HBM, and High-speed Die-die Interconnect

By Socionext

April 14, 2026

In-Field Monitoring of Chiplets via ML-Driven On-Die Telemetry

By ProteanTecs

April 14, 2026

Chiplets for Automotive, Industrial, and Aerospace Applications

By Fraunhofer IIS

March 27, 2026

Designing the Future Today: AI-Driven Multi-Die Design

By Synopsys

March 27, 2026