Embodied Emissions of 2.5D and 3D Scaling in Chipletized GPUs for Low-Carbon AI By Hannah Watson, imec October 26, 2026
Adaptive 3D Chiplet Architecture with Hybrid Wired–Wireless Interconnect for Energy-Efficient Heterogeneous Computing By Ch. Sreedhar, Shri Venkateshwara University October 21, 2026
LLM-Augmented Bayesian Optimization with Adaptive Policies for Chiplet Design Space Exploration By Hang Liu, Zhejiang University October 14, 2026
Divide and conquer: Scalable performance and energy in MCM GPUs By Mario Ibáñez Bolado, Universidad de Cantabria October 5, 2026
The Open Chiplet Economy: Progress, Challenges, and the Road Ahead By Microchip, Palo Alto Electron, Arm October 28, 2026
Agile Silicon Will Open Chiplet Architectures Keep Pace with Fast-Evolving AI Dataflows By Luisa Gonzalez-Guerrero, Lawrence Berkeley National Laboratory October 27, 2026
One Abstraction, Many Transports: Push-Mode Communication from Chiplet to Rack By Sai Rahul Chalamalasetti October 26, 2026
Advancing Chiplet Flexibility Updates in 2.0 OCE Transaction and Link Layer Specification By Brian Murray October 23, 2026
THz/RF Corridors as a General in-package Fabric For Chiplets, HBM, and High-speed Die-die Interconnect By Socionext April 14, 2026