Failure Analysis in Transition: An Industry Survey of Challenges, Priorities, and Standardization Needs in Advanced Packaging and Heterogeneous Integration By Himanandhan Reddy Kottur, University of Florida, Gainesville June 23, 2026
2.5D Root of Trust: Securing the Chiplet Ecosystem By Charles Williams, Texas A&M University June 23, 2026
Plasma Etch Process Optimization for Photonic-Grade Diamond-on-Insulator Substrates and Thickness Evaluation using Colorimetry By Tianyin Chen, Delft University of Technology June 19, 2026
CUTh-Solver: GPU-Accelerated Sparse Matrix Solver for High-Resolution Thermal Simulation of 3D ICs By Chenghan Wang, The Chinese University of Hong Kong June 18, 2026
Beyond the data pipe: Why connectivity IP is now the system-critical layer in every 3D IC By Tova Levy (Siemens EDA) & Archana Cheruliyil (Qualcomm) June 25, 2026
An Automated Interconnect Modeling Framework for Rapid Cryptolet Design Space Exploration By Austin Rovinski (NYU) June 24, 2026
DICE: Detailed Inter-Chiplet End-to-End PHY Modeling for Accurate Chiplet Simulation By Rashid Aligholipour June 22, 2026
THz/RF Corridors as a General in-package Fabric For Chiplets, HBM, and High-speed Die-die Interconnect By Socionext April 14, 2026