C2C-Explorer: An Exploration Framework for Chip-to-Chip Interconnect Architectures in LLM Cloud Computing Systems By Jiayi Li, Peking University August 12, 2026
ReVolt: Power Delivery Network-Aware Voltage Droop Control for 2.5D PIM Chiplet Architectures By Vibhanshu Sharma, Washington State University August 11, 2026
Innovative FA hardware solution to enable system-level debug of 3D ICs By Lesly Endrinal, Google LLC August 11, 2026
Hardware Design and Security in the Era of Chiplets and LLMs By Johann Knechtel, NYU Abu Dhabi August 6, 2026
Stop Guessing on Multi-Die PG Planning: Let AI Find the IR-Drop Sweet Spot By Soheil Modirzadeh August 13, 2026
What's New in UALink? Technical Deep Dive into the Latest UALink Specifications By Derek Williams (AMD), Dave Brown (AMD), Justin King (AMD), Arun Satyanarayana (Google) and Rob Pelt (AMD) August 6, 2026
THz/RF Corridors as a General in-package Fabric For Chiplets, HBM, and High-speed Die-die Interconnect By Socionext April 14, 2026