CCD-Level and Load-Aware Thread Orchestration for In-Memory Vector ANNS on Multi-Core CPUs By Yuchen Huang, East China Normal University May 15, 2026
A Review of Multiscale Thermal Modeling in Heterogeneous 3D ICs By Baibhari Priya Barua, University of Tennessee May 13, 2026
Spying Across Chiplets: Side-Channel Attacks in 2.5/3D Integrated Systems By Giorgio Di Natale, Univ. Grenoble Alpes May 12, 2026
Cadence & Samsung: Chiplet Ecosystem Innovation for Edge AI | CadenceLive 2026 By Mick Posner, Cadence and Kevin Yee, Samsung Foundry May 2, 2026
THz/RF Corridors as a General in-package Fabric For Chiplets, HBM, and High-speed Die-die Interconnect By Socionext April 14, 2026