Chiplet Technical Library

Thermal Tuning Overhead in Wafer-Scale Optical Interconnects for LLM MoE Training: A Cross-Layer Analysis and Ferroelectric-Based Mitigation

By Seongwon Yoon, Georgia Institute of Technology

August 27, 2026

An Open-Source Benchmark Suite of 3D-IC Testcases

By Rohan Soni, University of California

August 27, 2026

IC-ThermBench: An Open, Progressive Benchmark for Generalizable 2.5D/3D-IC Thermal Learning

By David Huang, University of Technology Sydney

August 26, 2026

Architecting the Next Generation of Asynchronous, Distributed GPUs for the AI Era

By Junrui Pan, Purdue University

August 25, 2026

From chips to silicon destiny: The next wave of 3D IC

By Piyush Sancheti

August 18, 2026

How Chiplets are Helping to Democratize Semiconductor Design with Mohit Gupta, CEO of TYLsemi

By Justin Kinsey, SBT & Mohit Gupta, TYLsemi

August 17, 2026

The Future of 3D Heterogeneous Integration (3DHI)

By Madhavan Swaminathan

August 13, 2026

Stop Guessing on Multi-Die PG Planning: Let AI Find the IR-Drop Sweet Spot

By Soheil Modirzadeh

August 13, 2026

THz/RF Corridors as a General in-package Fabric For Chiplets, HBM, and High-speed Die-die Interconnect

By Socionext

April 14, 2026

In-Field Monitoring of Chiplets via ML-Driven On-Die Telemetry

By ProteanTecs

April 14, 2026

Chiplets for Automotive, Industrial, and Aerospace Applications

By Fraunhofer IIS

March 27, 2026

Designing the Future Today: AI-Driven Multi-Die Design

By Synopsys

March 27, 2026