The reference hub for the chiplet ecosystem
Where the chiplet marketplace starts with trust.
New Chiplets
Integrated voltage regulator (IVR) chiplet
- In-package voltage regulation for improved efficiency and performance.
- Reduced board-level complexity and external power components.
- Real-time control and feedback for dynamic system optimization.
High-performance connectivity chiplets
- PCIe and CXL-based connectivity for chiplet and system-level communications.
- High-bandwidth, low-latency data movement across compute, memory, and IO domains.
- Reusable IO architecture that reduces engineering effort across AI designs.
IMDD Tx PICs
- Reliable & qualified
- Supports single or dual input laser to drive all 8-channels
- CMOS-level drive voltage, featuring our patented ultra-low drive voltage design
- > 110 GHz electro-optic bandwidth
Near-Packaged Optics (NPO) Chiplet Solution
- CPO/NPO connectivity for GPU/Switch/ASIC with integrated OSPic™ all-optical signal processor
- High capacity, low latency up to 10Tbps for scale out CPO
- From 1.6Tbps to 6.4Tbps NPO in-field serviceability with heterogeneous laser integration
New Chiplet-Ready IP
Ncore Multi-Die Interconnect IP
- Scale Performance with Multi-Die Coherency
- Increase Bandwidth and Reduce Latency
- Tune Systems for Flexibility and Design Requirements
eFPGA Chiplet
- Optimized Performance for Advanced Computing
- Reduced Development Risk and Faster Time-to-Market
- MOSAICS-Ready Chiplet Architecture
High Performance Droplet
- High-Performance Analog Front-Ends (AFEs): Essential for data acquisition and signal processing in various applications.
- High-Speed Interfaces: Facilitating seamless communication between solutions. Omni Design supports various standards, including JESD204 and PCIe.
- Custom Solutions: Omni Design can tailor SoC solutions to meet specific customer requirements.
12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- UCIe based Ka/Ku band transceiver
- Wide Bandwidth
- Scalable solution for dense mm-wave radio into single multi-chip modules
UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- 2T2R chiplet configuration
- 160/175-GSa/s sample rate
- 7-bit resolution
100G optical I/O chiplets
- RANOVUS®’ Odin® optical I/O cores set industry benchmarks for high bandwidth, low power consumption and small size for AI, cloud, metaverse, and communications applications
Insights
Ecosystem Highlights
UCIe Consortium Advances from Chiplet Connectivity to System-Level Integration with UCIe 4.0 Specification
2026-11-12T13:14:00+00:00
ASRA and imec release joint architectural requirements for interoperable automotive chiplets
2026-11-12T06:54:46+00:00
Expert Perspectives
The chip beneath the chips: Why silicon interposers matter more than ever
When Every Chiplet Passes, Who Fixes the Package?
Scaling optical interconnects for the AI era
Q&A: What Real-World Projects Reveal About Multi-Die Design
Recent Updates
Standards & Research
Standards & Research
Netherlands and Taiwan Launch Four Joint Photonics R&D Projects
2026-11-12T07:26:55+00:00
Standards & Research
ASRA and imec release joint architectural requirements for interoperable automotive chiplets
2026-11-12T06:54:46+00:00
Interconnects & Integration
Business & Deals
Ecosystem & Strategy
Technical Library
Whitepapers & Technical Articles
Tri-Stack-PIM: A Heterogeneous Multi-Die 3D-Integrated Processing-in-Memory Architecture for Efficient LLM Inference
CU-3D: A Scalable Legality-Aware RTL-to-GDS Flow for 3D-IC Physical Design
Beyond Host-Side Control: HBM Controller Partitioning Across Host and HBM Base Dies
Chiplet-NAS: Chiplet-aware Neural Architecture Search for Efficient AI Inference on 2.5D Integration