The reference hub for the chiplet ecosystem
Where the chiplet marketplace starts with trust.
New Chiplets
Integrated voltage regulator (IVR) chiplet
- In-package voltage regulation for improved efficiency and performance.
- Reduced board-level complexity and external power components.
- Real-time control and feedback for dynamic system optimization.
High-performance connectivity chiplets
- PCIe and CXL-based connectivity for chiplet and system-level communications.
- High-bandwidth, low-latency data movement across compute, memory, and IO domains.
- Reusable IO architecture that reduces engineering effort across AI designs.
IMDD Tx PICs
- Reliable & qualified
- Supports single or dual input laser to drive all 8-channels
- CMOS-level drive voltage, featuring our patented ultra-low drive voltage design
- > 110 GHz electro-optic bandwidth
Near-Packaged Optics (NPO) Chiplet Solution
- CPO/NPO connectivity for GPU/Switch/ASIC with integrated OSPic™ all-optical signal processor
- High capacity, low latency up to 10Tbps for scale out CPO
- From 1.6Tbps to 6.4Tbps NPO in-field serviceability with heterogeneous laser integration
New Chiplet-Ready IP
Ncore Multi-Die Interconnect IP
- Scale Performance with Multi-Die Coherency
- Increase Bandwidth and Reduce Latency
- Tune Systems for Flexibility and Design Requirements
eFPGA Chiplet
- Optimized Performance for Advanced Computing
- Reduced Development Risk and Faster Time-to-Market
- MOSAICS-Ready Chiplet Architecture
High Performance Droplet
- High-Performance Analog Front-Ends (AFEs): Essential for data acquisition and signal processing in various applications.
- High-Speed Interfaces: Facilitating seamless communication between solutions. Omni Design supports various standards, including JESD204 and PCIe.
- Custom Solutions: Omni Design can tailor SoC solutions to meet specific customer requirements.
12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- UCIe based Ka/Ku band transceiver
- Wide Bandwidth
- Scalable solution for dense mm-wave radio into single multi-chip modules
UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- 2T2R chiplet configuration
- 160/175-GSa/s sample rate
- 7-bit resolution
100G optical I/O chiplets
- RANOVUS®’ Odin® optical I/O cores set industry benchmarks for high bandwidth, low power consumption and small size for AI, cloud, metaverse, and communications applications
Insights
Ecosystem Highlights
Powerlattice Demonstrates Industry’s First Monolithic IVR Chiplet to Break the AI Power Wall
2026-10-26T15:22:13+00:00
Tenstorrent Releases Open Source Beta of the Open Chiplet Atlas® (OCA) Harness
2026-10-23T05:08:46+00:00
Expert Perspectives
The AI Packaging Challenge: 5 Reasons Panels Are Gaining Momentum
Understanding the Shift Towards Chiplet Architecture in SoC Design
Cooling Is Becoming Part of the Chiplet Architecture
When AI Moves the World: Building a Chiplet Standard for Physical AI
Recent Updates
Chiplets
Powerlattice Demonstrates Industry’s First Monolithic IVR Chiplet to Break the AI Power Wall
2026-10-26T15:22:13+00:00
Manufacturing & Supply Chain
Von Aredenne Addresses Semiconductor Panel-Level Packaging Market with New HiPIMS Deposition Solution
2026-10-26T14:29:02+00:00
Chiplets
Standards & Research
Tenstorrent Releases Open Source Beta of the Open Chiplet Atlas® (OCA) Harness
2026-10-23T05:08:46+00:00
Manufacturing & Supply Chain
Ecosystem & Strategy
Technical Library
Whitepapers & Technical Articles
Embodied Emissions of 2.5D and 3D Scaling in Chipletized GPUs for Low-Carbon AI
Adaptive 3D Chiplet Architecture with Hybrid Wired–Wireless Interconnect for Energy-Efficient Heterogeneous Computing
LLM-Augmented Bayesian Optimization with Adaptive Policies for Chiplet Design Space Exploration
Divide and conquer: Scalable performance and energy in MCM GPUs
Videos
Agile Silicon Will Open Chiplet Architectures Keep Pace with Fast-Evolving AI Dataflows
One Abstraction, Many Transports: Push-Mode Communication from Chiplet to Rack
Advancing Chiplet Flexibility Updates in 2.0 OCE Transaction and Link Layer Specification
GTC '26 - Berlin | Long-running, multi-tool Fuse Agents for 3D IC workflows