The reference hub for the chiplet ecosystem
Where the chiplet marketplace starts with trust.
New Chiplets
Integrated voltage regulator (IVR) chiplet
- In-package voltage regulation for improved efficiency and performance.
- Reduced board-level complexity and external power components.
- Real-time control and feedback for dynamic system optimization.
High-performance connectivity chiplets
- PCIe and CXL-based connectivity for chiplet and system-level communications.
- High-bandwidth, low-latency data movement across compute, memory, and IO domains.
- Reusable IO architecture that reduces engineering effort across AI designs.
IMDD Tx PICs
- Reliable & qualified
- Supports single or dual input laser to drive all 8-channels
- CMOS-level drive voltage, featuring our patented ultra-low drive voltage design
- > 110 GHz electro-optic bandwidth
Near-Packaged Optics (NPO) Chiplet Solution
- CPO/NPO connectivity for GPU/Switch/ASIC with integrated OSPic™ all-optical signal processor
- High capacity, low latency up to 10Tbps for scale out CPO
- From 1.6Tbps to 6.4Tbps NPO in-field serviceability with heterogeneous laser integration
12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- UCIe based Ka/Ku band transceiver
- Wide Bandwidth
- Scalable solution for dense mm-wave radio into single multi-chip modules
New Chiplet-Ready IP
Ncore Multi-Die Interconnect IP
- Scale Performance with Multi-Die Coherency
- Increase Bandwidth and Reduce Latency
- Tune Systems for Flexibility and Design Requirements
eFPGA Chiplet
- Optimized Performance for Advanced Computing
- Reduced Development Risk and Faster Time-to-Market
- MOSAICS-Ready Chiplet Architecture
High Performance Droplet
- High-Performance Analog Front-Ends (AFEs): Essential for data acquisition and signal processing in various applications.
- High-Speed Interfaces: Facilitating seamless communication between solutions. Omni Design supports various standards, including JESD204 and PCIe.
- Custom Solutions: Omni Design can tailor SoC solutions to meet specific customer requirements.
12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- UCIe based Ka/Ku band transceiver
- Wide Bandwidth
- Scalable solution for dense mm-wave radio into single multi-chip modules
UCIe AP based 8-bit 170-Gsps Chiplet Transceiver
- 2T2R chiplet configuration
- 160/175-GSa/s sample rate
- 7-bit resolution
100G optical I/O chiplets
- RANOVUS®’ Odin® optical I/O cores set industry benchmarks for high bandwidth, low power consumption and small size for AI, cloud, metaverse, and communications applications
Insights
Ecosystem Highlights
Wiwynn, Ayar Labs, and GUC Advance Co-Packaged Optics with Live Demonstration of Integrated Optical Compute System at OCP Global Summit 2026
2026-10-14T11:33:33+00:00
Eliyan Introduces NuLight™: World’s First 2D microVCSEL Interconnect Solution to the Copper Wall
2026-10-14T05:45:00+00:00
Expert Perspectives
Co-Packaged Optics Moves from Promise to Production Planning
Co-Packaged Optics Moves from Promise to Production Planning
Co-Packaged Optics Moves from Promise to Production Planning
Deep dive into Azure Maia 300 architecture
Recent Updates
Interconnects & Integration
Chiplet-Ready IP
Chiplets
Eliyan Introduces NuLight™: World’s First 2D microVCSEL Interconnect Solution to the Copper Wall
2026-10-14T05:45:00+00:00
Manufacturing & Supply Chain
Evatec delivers first CLUSTERLINE® 310 for Advanced Packaging on small panel formats
2026-10-13T15:26:45+00:00
Manufacturing & Supply Chain
Europe’s Advanced Packaging Gap: Fraunhofer, Swissbit Target the Missing Middle
2026-10-13T11:21:07+00:00
Design, Tools & Validation
Technical Library
Whitepapers & Technical Articles
LLM-Augmented Bayesian Optimization with Adaptive Policies for Chiplet Design Space Exploration
Divide and conquer: Scalable performance and energy in MCM GPUs
A Composable AI-Accelerated Iterative Solver for 3D-IC Thermal Modeling
QBX: A Compiler for 2-local Qubit Hamiltonian Simulation on Quantum Chiplets