Interconnect & IO Chiplet
Interconnect & IO Chiplet enable high-bandwidth, low-latency communication between compute, memory, and external systems in modern heterogeneous architectures. As system performance increasingly depends on data movement efficiency, these chiplets form the backbone of scalable multi-die platforms.
This category includes SerDes, die-to-die interconnect, high-speed electrical IO, and optical / photonic chiplets, supporting standards such as UCIe, PCIe, CXL, Ethernet, and emerging optical interfaces. Interconnect & IO chiplets are essential for AI accelerators, HPC systems, and data center platforms requiring massive bandwidth, interoperability, and power efficiency.
Designed for advanced packaging technologies including 2.5D, 3D, co-packaged optics (CPO), and near-packaged optics (NPO), these chiplets enable modular system design and flexible integration across vendors and process nodes. Interconnect & IO chiplets are a key enabler of next-generation AI factories and disaggregated computing architectures.
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Interconnect Chiplet
- Integrates 16 complete UCIe modules, following the standard UCIe 1.1 standard
- Integrates one complete HBM3 IP, including the controller and PHY, following the HBM3 JESD238 standard
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Bridglets
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400G Transmitter Chiplet for 400G, 800G and 1.6T Pluggable Transceivers
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100G optical I/O chiplets
- RANOVUS®’ Odin® optical I/O cores set industry benchmarks for high bandwidth, low power consumption and small size for AI, cloud, metaverse, and communications applications
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Transceiver Chiplet
- Die-level transceiver products with AIB or SerDes interfaces
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High-Density Electronic-Photonic Chiplet
- Parallel electrical interface
- Supports AIB and other proprietary parallel interfaces
- 8 full-duplex optical ports
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Reconfigurable 112G SerDes IO with integrated protocol controllers, security IP and UCIe PHY and Controller IP