3DLS: A 3D Logic-Stacked Architecture for Disaggregated LLM Serving By Jaehun Lee, KAIST July 6, 2026
WarpagePINN: Thermal Warpage Prediction in Advanced Packaging via a Two-Stage Physics-Informed Neural Networks By Xinyu Li, Shanghai University July 2, 2026
A Comprehensive Design Framework for Vertical Power Delivery in High-Performance Computing By Sriharini Krishnakumar, University of Illinois Chicago June 30, 2026
SHIFT: Dynamic Compute Relocation Framework for Communication-Aware Chiplet-Based Systems By Arvin Delavari, University of California, Irvine June 30, 2026
Failure Analysis in Transition: An Industry Survey of Challenges, Priorities, and Standardization Needs in Advanced Packaging and Heterogeneous Integration By Himanandhan Reddy Kottur, University of Florida, Gainesville June 23, 2026
2.5D Root of Trust: Securing the Chiplet Ecosystem By Charles Williams, Texas A&M University June 23, 2026
Plasma Etch Process Optimization for Photonic-Grade Diamond-on-Insulator Substrates and Thickness Evaluation using Colorimetry By Tianyin Chen, Delft University of Technology June 19, 2026
CUTh-Solver: GPU-Accelerated Sparse Matrix Solver for High-Resolution Thermal Simulation of 3D ICs By Chenghan Wang, The Chinese University of Hong Kong June 18, 2026
Making Locality-aware GEMM Compatible with Page-Granularity Placement on Chiplet GPUs By Euijun Chung, Georgia Institute of Technology June 11, 2026
Advanced semiconductor packaging design via artificial intelligence and machine learning: A review By Mohammad Rafiee, University of Ottawa June 9, 2026
DTCO of NOR-Type IGZO FeFETs for 3D Heterogeneous AI Memories: A Read-Centric Perspective By Yang Xiang, imec June 8, 2026
Modeling, Optimizing and Exploring Multi-Die FPGA Routing Architectures By Amirhossein Poolad, University of Toronto June 5, 2026
A 32 Gb/s 0.41 pJ/bit Single-Ended Transmitter with TX-Based-Only Adaptive Crosstalk Cancellation for Ultra-Short-Reach Wireline Applications By Yixuan Shen, Institute of Microelectronics of the Chinese Academy of Sciences June 5, 2026
Transient Multiscale Workflow for Thermal Analysis of 3DHI Chip Stack By Mohammad Elahi, Rensselaer Polytechnic Institute June 2, 2026
Dispersion-Engineered Terahertz Silicon Interconnects Enabling Terabit-Scale Data Links By Bodhan Chakraborty, Nanyang Technological University June 1, 2026
Design-Oriented Modeling of TSV Substrate Noise Coupling to Ring VCOs By Ilias Exouzidis, National Technical University of Athens May 29, 2026
CLIPGen: A Chiplet Link IP Modeling and Generation Framework for 2.5D Architecture Exploration By Zhengping Zhu, New York University May 28, 2026
Wafer Warpage of Silicon Interposer in Manufacturing Processes for High Density 2.5D Advanced Packaging: Causes, Measurement, Analysis and Optimization By Hanwen Cui, Wuhan University May 22, 2026
Predictive Software Scheduling as an Early-Warning Hint Layer for Optical Engine Thermal Drift in Heterogeneous SoIC Packaging By Chi Fei Chung, Dollarchip Technology Inc. May 19, 2026
Micro-Transfer Printing on Silicon Photonics: Tutorial, Recent Progress and Outlook By Ye Chen, Ghent University, IMEC May 18, 2026