Multi-Chiplet Heterogeneous Integration Packaging for Semiconductor System By Surya Bhattacharya, A*STAR July 9, 2024
Intel Demonstrates First Fully Integrated Optical I/O Chiplet for More Scalable AI By Intel June 27, 2024
Introduction to UCIe Tutorial: Electrical, Form Factor, and Compliance By Zuoguo (Joe) Wu, Intel June 3, 2024
Heterogeneous 2.5/3D Chip Design Requires Integrated Tools By Kevin Rinebold, Siemens EDA June 3, 2024
"Automotive AI: ADAS, Functional Safety and Chiplets" AI with Sally - New Tech Podcast By Sally Ward-Foxton May 27, 2024
Balaji Baktha, Paving the Road Ahead RISC V and Chiplet Technologies in Modern Automotive & More By Balaji Baktha, Ventana Micro Systems May 13, 2024
Surface codes and modular chiplets in the presence of defects By Sophia Lin (University of Chicago) May 10, 2024
UCIe Progress Report: Big Enhancements, IP Maturity, and Ecosystem Interoperability By Manmeet Walia, Synopsys May 6, 2024
Why chiplet will transform the semiconductor ecosystem from design to packaging? By Emilie Jolivet, Yole Group May 6, 2024