Tutorial: Introduction to Chiplet Interconnect Test and Repair

By Sreejit Chakravarty, IEEE Fellow, Distingushed Engineer, Ampere Computing
August 2024

The goal of this tutorial is to introduce the attendees to the chip-let interconnect test and repair problem. In part 1 of the proposed two-part tutorial, we delve into the fundamentals of chip-let interconnect test and repair. This will include topics listed under Topic number 1 in Section 2.5. Broadly speaking, attendees will understand the impact of various packaging technology on chip-let interconnect test and repair, the kind of failure mechanisms observed and expected, tests required to detect such failures, repair mechanism required to repair interconnects against such failure modes, etc.