Towards wafer-scale optical interconnect relying on Silicon Photonics and advanced 3D assembly
Presenter: Peter Ossieur, Scientific Director, IMEC
The combination of novel device technologies and advanced 3D assembly technology such as hybrid bonding can be leveraged to realize wafer-scale optical interconnect with 10Tb/s/mm shoreline densities.
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related Videos
- Getting Moore with Less: How Chiplets and Open Interconnect Accelerate Cloud-Optimized AI Silicon
- Design and Assembly of an Automotive-Grade Chiplet-Based Multiple Systems-on-Chip
- Zero trust in silicon: The new security imperative for chiplet-based 3D ICs
- All About Optical Interconnects
Latest Videos
- 2026 DRAM and Advanced Packaging Master Class
- Chiplets, RISC-V, and Europe's AI Silicon Ambition
- Driving the Future of Automotive Compute with UCIe
- A Physics-Informed Neural Network Surrogate for Runtime PDN and Dynamic Droop Prediction in 2.5-D Chiplet Integration
- A Chiplet Interface Model for System-Level PPA Exploration