Advances in waveguide to waveguide couplers for 3D integrated photonic packaging
By Drew Weninger 1, Samuel Serna 2, Luigi Ranno 3, Lionel Kimerling 3 and Anuradha Agarwal 1
1 Massachusetts Institute of Technology, Cambridge, USA.
2 Bridgewater State University, Bridgewater, USA.
3 Massachusetts Institute of Technology, USA.

Abstract
In this paper, we provide an overview and comparison of devices used for optical waveguide-to-waveguide coupling including inter-chip edge couplers, grating couplers, free form couplers, evanescent couplers, cantilever couplers, and optical wirebonds. In addition, technology for efficient transmission of light through chips is discussed including guided mode and free form photonic vias for substrates including silicon, glass, and organics. The results are discussed in the context of potential applications including co-packaged optics switch packages, replaceable biochemical sensors, optically connected memory, optical computing, integrated quantum photonics, and integrated LiDAR systems to show possible improvements in energy efficiency, performance, and cost.
To read the full article, click here
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related Technical Papers
- Monolithically Integrated Optical Through-Silicon Waveguides for 3D Chip-to-Chip Photonic Interconnects
- Cross Waveguide Design for Color-Centers in Diamond for Photonic Quantum Computing
- AI-Driven Thermal Mapping and Management in 3D Integrated Photonic Circuits
- 3D Guard-Layer: An Integrated Agentic AI Safety System for Edge Artificial Intelligence
Latest Technical Papers
- Understanding and Profiling the Accelerator Chiplet Network Using PingPoint
- C2C-Explorer: An Exploration Framework for Chip-to-Chip Interconnect Architectures in LLM Cloud Computing Systems
- ReVolt: Power Delivery Network-Aware Voltage Droop Control for 2.5D PIM Chiplet Architectures
- Innovative FA hardware solution to enable system-level debug of 3D ICs
- Hardware Design and Security in the Era of Chiplets and LLMs