Benefits And Challenges Of Using Chiplets
The move to chiplets opens the door to more features than can be packed into a reticle-sized SoC. That potentially means more processing power, simpler designs, and higher yields. But it's not as simple as swapping LEGO blocks into a chassis. Ashley Stevens, director of product management and marketing at Arteris, talks with Semiconductor Engineering about the challenges of using coherent versus non-coherent interfaces between chiplets, the implications of heterogeneous versus homogeneous chiplets, and the impact on partitioning and derivative designs.
Related Chiplet
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
Related Videos
- IBM Research: Benefits and challenges of Chiplets
- Cost And Quality Of Chiplets
- Challenges With Chiplets And Power Delivery
- Surface codes and modular chiplets in the presence of defects
Latest Videos
- Beyond the data pipe: Why connectivity IP is now the system-critical layer in every 3D IC
- An Automated Interconnect Modeling Framework for Rapid Cryptolet Design Space Exploration
- DICE: Detailed Inter-Chiplet End-to-End PHY Modeling for Accurate Chiplet Simulation
- The Evolution Of UCIe
- Blueprint for AI Hardware But with Instructions: Pre-Validated Chiplet Building Blocks