Blueprint for AI Hardware But with Instructions: Pre-Validated Chiplet Building Blocks
Synopsys, Arm, and AMI discuss deploying chiplet systems at scale. In this video, leaders explain how IP, firmware, and interconnect standards must align to enable practical architectures for AI, automotive, and HPC designs.
Speakers
- Frank Schirrmeister, Executive Director, Product Management, Synopsys
- Marc Meunier, Director of Ecosystem Developement, Arm
- Sanjoy Maity, Chief Executive Officer, AMI
Related Chiplet
- Optical Chiplet
- Reverse Gearbox Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
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