An EDA perspective on chips transforming into 3D systems

By Martin Biehl, AE director at Cadence

To meet today’s demands of increased functional density, higher bandwidths, lower power, smaller form-factors and lower costs, design teams are pivoting from Moore’s Law to More-than-Moore; a world of advanced packaging techniques involving multiple stacked and unstacked chiplets in a single package. Helping to accelerate this trend, the large IC foundries are now competing with the traditional packaging solution providers (OSATs) by providing their own back-end/packaging solutions based on wafer-level manufacturing techniques. The result is an explosion in the number of packaging technologies, and in the process, shifting semiconductor packaging from a necessary evil to a value-add, differentiating technology. From this presentation, you will learn about trends in advanced multi-chip(let) architectures, and design challenges for package and IC engineers when migrating to cutting-edge 2.5D and 3D packaging solutions.

Biography:

Martin Biehl is AE director at Cadence responsible for the PCB, IC Package and Multi Systems Analysis tools in Europe. Martin holds a PhD in Electrical Engineering from university Karlsruhe Germany. He worked 7 years in a PCB design team at Siemens before joining Cadence in 2005.”