“Dating” and “Marrying”: An AI Chiplet’s Perspective
Arvind Kumar, Principal Researcher, IBM Research
Disaggregation into chiplets is a promising future path for the IBM AIU, an AI accelerator SoC designed by IBM Research. For example, an AI chiplet in combination with other chiplets in an open chiplet ecosystem would enable creation of performant chiplet architectures for domain-specific applications. However, an AI chiplet on the path to that long-term vision faces many barriers – including the lack of architectural modeling tools, establishing interoperability with other potential chiplets, and validation in the absence of other chiplets. Once these are overcome, additional challenges include the packaging sourcing and test and validation methodologies. I will discuss these challenges and potential solutions.
About the speaker
Dr. Arvind Kumar is a Principal Researcher and Manager at the IBM Research where he leads a team focusing on next generation AI Hardware and heterogeneous integration. He has presented several invited talks and served as a panelist and short-course instructor in this area at major conferences. He holds over 70 patents and is an IBM Master Inventor. Dr. Kumar earned SB, SM, and PhD degrees in Electrical Engineering and Computer Science, all from MIT.
Related Chiplet
Related Videos
- Rearchitecting AI Infrastructure with General Purpose and Accelerator Chiplets
- Chiplet based Reconfigurable OCP Accelerator Module (OAM) architecture and platform
- Chiplets for the future of AI
- Intel Demonstrates First Fully Integrated Optical I/O Chiplet for More Scalable AI
Latest Videos
- 2026 Predictions from Alpahwave Semi, now part of Qualcomm
- Arm Viewpoints: Chiplets explained – the technology and economics behind the next wave of silicon innovation
- The State of Multi-Die: Insights and Customer Requirements
- Coding approaches for increasing reliability and energy efficiency of 3D technologies
- AI-Driven Thermal Prediction for Enhanced Reliability in 3D HBM Chiplets