The Rise of The Hublet™ & FPGA Chiplets
This webinar details how the Primemas Hub Chiplet (Hublet™) is revolutionizing SoC design, providing scalable, modular platforms tailored for accelerators and CXL memory solutions. By integrating Achronix Speedcore™ IP within Primemas’ FPGA chiplets, engineers gain unparalleled flexibility to quickly reprogram hardware for performance demanding applications in just hours. With die-to-die IP support from Blue Cheetah, this innovative architecture drastically reduces time-to-market while enhancing scalability.
Moderator:
- Clive "Max" Maxfield
Panelists:
- Il (Will) Park, Primemas
- Nick Ilyadis, Achronix
- Elad Alon, Blue Cheetah
Related Videos
- Chiplet Architecture Accelerates Delivery of Industry-Leading Intel® FPGA Features and Capabilities
- Rapid Innovation with Chiplets and FPGAs
- Pat Gelsinger on the Universal Chiplet Interconnect Express (UCIe)
- China Target Chiplet, will it be a shortcut for China semiconductor self sufficiency？
Latest Videos
- Accelerating AI Innovation with Arm Total Design: A Case Study
- The Rise of The Hublet™ & FPGA Chiplets
- From Internal Designs to Open Chiplet Economy: Discussion on How to Create Open, Democratized Access to Chiplet Technology
- “Dating” and “Marrying”: An AI Chiplet’s Perspective
- Impact of Chiplets, Heterogeneous Integration and Modularity on AI and HPC systems