Pat Gelsinger on the Universal Chiplet Interconnect Express (UCIe)
At Intel Innovation 2022, Pat Gelsinger explains how Intel helped form the Universal Chiplet Interconnect Express (UCIe) consortium “to create an open chiplet ecosystem.” More than 80 companies in the semiconductor industry have joined to make an open chiplet interface a reality, including TSMC and Samsung.
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related Videos
- On Package Memory with Universal Chiplet Interconnect Express (UCIe): A Low-Power, High-Bandwith, Low-Latency and Low-Cost Approach
- Universal Chiplets Interconnect Express basics understanding
- Blue Cheetah BlueLynx for Heterogeneous Integration: 16 Gbps Chiplet Interconnect IP for UCIe & BoW
- Keysight Expands Chiplet Interconnect Support with UCIe 2.0 & BoW
Latest Videos
- 2026 DRAM and Advanced Packaging Master Class
- Chiplets, RISC-V, and Europe's AI Silicon Ambition
- Driving the Future of Automotive Compute with UCIe
- A Physics-Informed Neural Network Surrogate for Runtime PDN and Dynamic Droop Prediction in 2.5-D Chiplet Integration
- A Chiplet Interface Model for System-Level PPA Exploration