FPGA Chiplets

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5 Chiplet (1 - 5)

Heterogeneous FPGA chiplet implemented in 12nm
- 5K LUTs
- 16 x 8KB SRAMs (1Mb)
- 16 DSP blocks
FPGA Chiplets with 40K -600K LUTS
UCIe based 8-bit 48-Gsps Transceiver
- 48-Gsps peak sample rate
- 8 bit resolution
- UCIe SP (16x lanes at 16Gbps) with streaming controller
UCIe based 12-bit 12-Gsps Transceiver
- 12-Gsps peak sample rate
- 12 bit resolution (programmable)
- UCIe SP (16x lanes at 16Gbps) with streaming controller
Speedcore eFPGA Chiplet