FPGA Chiplets
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4)
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eFPGA Chiplet
- Optimized Performance for Advanced Computing
- Reduced Development Risk and Faster Time-to-Market
- MOSAICS-Ready Chiplet Architecture
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UCIe based 8-bit 48-Gsps Transceiver
- 48-Gsps peak sample rate
- 8 bit resolution
- UCIe SP (16x lanes at 16Gbps) with streaming controller
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UCIe based 12-bit 12-Gsps Transceiver
- 12-Gsps peak sample rate
- 12 bit resolution (programmable)
- UCIe SP (16x lanes at 16Gbps) with streaming controller
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Speedcore eFPGA Chiplet