Benefits And Challenges Of Using Chiplets
The move to chiplets opens the door to more features than can be packed into a reticle-sized SoC. That potentially means more processing power, simpler designs, and higher yields. But it's not as simple as swapping LEGO blocks into a chassis. Ashley Stevens, director of product management and marketing at Arteris, talks with Semiconductor Engineering about the challenges of using coherent versus non-coherent interfaces between chiplets, the implications of heterogeneous versus homogeneous chiplets, and the impact on partitioning and derivative designs.
Related Chiplet
- Interconnect Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related Videos
- IBM Research: Benefits and challenges of Chiplets
- Cost And Quality Of Chiplets
- Challenges With Chiplets And Power Delivery
- Surface codes and modular chiplets in the presence of defects
Latest Videos
- Chiplet Quilting for the Age of Inference
- DreamBig Semiconductor's Journey From Seed to Series B Funding for Their Multi-Die AI Chiplet
- Scaling a chiplet-based quantum processor toward fault-tolerance
- Splitting the Die A Modular Approach to Chiplet Design and Verification
- OCE Transaction and Link Layer Specification 1.2 Update