Alphawave and Keysight: UCIe Compliance Validation Journey from System Simulation to Silicon
By Letizia Giuliano, Alphawave Semi
Alphawave Semi talks about how it uses Keysight Chiplet PHY Designer to validate its IP and chips for UCIe compliance.
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related Videos
- Introduction to UCIe Tutorial: Electrical, Form Factor, and Compliance
- Building an Interoperable Chiplet Ecosystem through Golden Die Validation with Pre Silicon Correlation
- Keysight UCIe Chiplet PHY Designer Demo
- Keysight Expands Chiplet Interconnect Support with UCIe 2.0 & BoW
Latest Videos
- Scaling AI with Chiplets & CPO
- Open Interconnect Innovations: A Deep Dive into the UALink Chiplet Specification Tutorial
- From chips to silicon destiny: The next wave of 3D IC
- How Chiplets are Helping to Democratize Semiconductor Design with Mohit Gupta, CEO of TYLsemi
- The Future of 3D Heterogeneous Integration (3DHI)