Chiplet Technical Library

Advances in waveguide to waveguide couplers for 3D integrated photonic packaging

By Drew Weninger, Massachusetts Institute of Technology

January 30, 2026

Lifecycle Cost-Effectiveness Modeling for Redundancy-Enhanced Multi-Chiplet Architectures

By Zizhen Liu, Chinese Academy of Sciences

January 28, 2026

DISTIL: A Distributed Spiking Neural Network Accelerator on 2.5D Chiplet Systems

By Pramit Kumar Pal, Washington State University

January 27, 2026

Multi-Partner Project: COIN-3D -- Collaborative Innovation in 3D VLSI Reliability

By George Rafael Gourdoumanis, University of Thessaly

January 22, 2026

2026 Predictions from Alpahwave Semi, now part of Qualcomm

By Tony Chan Carusone

January 30, 2026

Arm Viewpoints: Chiplets explained – the technology and economics behind the next wave of silicon innovation

By Austin Lyons & Brian Fuller

January 21, 2026

The State of Multi-Die: Insights and Customer Requirements

By Shekhar Kapoor, Synopsys

January 12, 2026

Coding approaches for increasing reliability and energy efficiency of​ 3D technologies

By Alberto Garcia-Ortiz

December 30, 2025

The Right Testing Strategy Can Save Designs

By Teradyne

February 24, 2025

Accelerating AI Chip Development with 3D Multi-Die Designs

By Synopsys

February 12, 2025

Scaling Connectivity for Chiplet-Based AI Systems

By Alphawave Semi

February 11, 2025

5 key reasons… Chiplet (die-2-die) interfaces require specialty I/O circuits and custom ESD protection

By Sofics

February 7, 2025