Podcast: How Achronix is Enabling Multi-Die Design and a Chiplet Ecosystem with Nick Ilyadis
Dan is joined by Nick Ilyadis, vice president of product planning at Achronix. Prior to Achronix, Nick was vice president of portfolio and technology strategy at Marvell Semiconductor and vice president and group CTO at Broadcom. Nick has also held many engineering roles during his career, starting as a chip designer and moving up through management to lead both device and product engineering teams. Nick is passionate about technology and a prolific inventor with 75 issued patents across all aspects of wired and wireless communications.
Nick describes how Achronix FPGA technology is enabling new types of designs with a focus on AI enablement. The strategies used to develop multi-die, chiplet-based designs and the various ways Achronix is making new design approaches a reality through technology development and partnerships are also discussed.
To read the full article, click here
Related Chiplet
- Interconnect Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Bridglets
- Automotive AI Accelerator
- Direct Chiplet Interface
Related Blogs
- Synopsys and Alchip Accelerate IO & Memory Chiplet Design for Multi-Die Systems
- Jumpstarting the Automotive Chiplet Ecosystem
- Streamlining Functional Verification for Multi-Die and Chiplet Designs
- Chiplet ecosystems enable multi-vendor designs
Latest Blogs
- Power Tradeoffs for Chiplets: What Designers Need to Know
- The Chiplet Consolidation Wave: How Strategic Acquisitions are Shaping the Future of Silicon
- Chiplets Turn 10: Here are Ten Things to Know
- Flexible Test Strategies Keeping Pace with Semiconductor Evolution
- Simplifying AI Chip Development: Arm and Synopsys Execs Discuss Chiplet, Subsystem, and IP Integration