Podcast: How Achronix is Enabling Multi-Die Design and a Chiplet Ecosystem with Nick Ilyadis
Dan is joined by Nick Ilyadis, vice president of product planning at Achronix. Prior to Achronix, Nick was vice president of portfolio and technology strategy at Marvell Semiconductor and vice president and group CTO at Broadcom. Nick has also held many engineering roles during his career, starting as a chip designer and moving up through management to lead both device and product engineering teams. Nick is passionate about technology and a prolific inventor with 75 issued patents across all aspects of wired and wireless communications.
Nick describes how Achronix FPGA technology is enabling new types of designs with a focus on AI enablement. The strategies used to develop multi-die, chiplet-based designs and the various ways Achronix is making new design approaches a reality through technology development and partnerships are also discussed.
To read the full article, click here
Related Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
Related Blogs
- Synopsys and Alchip Accelerate IO & Memory Chiplet Design for Multi-Die Systems
- Jumpstarting the Automotive Chiplet Ecosystem
- Streamlining Functional Verification for Multi-Die and Chiplet Designs
- Accelerating Chiplet Innovation with a New Partner Ecosystem
Latest Blogs
- SoC and NoC in the Chiplet Era: Understanding Modern SoC Architecture
- From Chiplet Design to Physical Reality: Why AI Hardware Needs Continuous Engineering Intelligence
- Beyond the Die Boundary: How Arteris Multi-Die Technology Is Redefining AI System Design
- Riding the Tide Toward Open Ecosystem-Based Chiplet Integration―Hitachi’s Efforts to Overcome Industry-wide Challenges with Quality Improvement Technology
- 3D IC design for the AI era: an EDA perspective