Use Cases for Chiplets in AI Clusters
What's driving the surge in chiplet technology investment?
Tony Chan Carusone, Chief Technology Officer from Alphawave Semi, explains:
- AI is the primary driver, enabled by mature die-to-die interface technologies that allow multiple chiplets to function as one large chip
- High-performance compute chiplets require high bandwidth density and low latency interfaces to effectively communicate between dies
- IO and optical chiplets are crucial for scaling AI clusters to thousands of elements, enabling connectivity across vast distances
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related Videos
- AI-Driven Thermal Prediction for Enhanced Reliability in 3D HBM Chiplets
- Chiplets for generative AI
- Chiplets for the future of AI
- Connectivity for AI Everywhere: The Role of Chiplets
Latest Videos
- 2026 DRAM and Advanced Packaging Master Class
- Chiplets, RISC-V, and Europe's AI Silicon Ambition
- Driving the Future of Automotive Compute with UCIe
- A Physics-Informed Neural Network Surrogate for Runtime PDN and Dynamic Droop Prediction in 2.5-D Chiplet Integration
- A Chiplet Interface Model for System-Level PPA Exploration