Use Cases for Chiplets in AI Clusters
What's driving the surge in chiplet technology investment?
Tony Chan Carusone, Chief Technology Officer from Alphawave Semi, explains:
- AI is the primary driver, enabled by mature die-to-die interface technologies that allow multiple chiplets to function as one large chip
- High-performance compute chiplets require high bandwidth density and low latency interfaces to effectively communicate between dies
- IO and optical chiplets are crucial for scaling AI clusters to thousands of elements, enabling connectivity across vast distances
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related Videos
- Photonic Fabric Interface Chiplets for AI XPU Optical Connectivity
- AI-Driven Thermal Prediction for Enhanced Reliability in 3D HBM Chiplets
- Chiplets for generative AI
- Chiplets for the future of AI
Latest Videos
- 2026 Predictions from Alpahwave Semi, now part of Qualcomm
- Arm Viewpoints: Chiplets explained – the technology and economics behind the next wave of silicon innovation
- The State of Multi-Die: Insights and Customer Requirements
- Coding approaches for increasing reliability and energy efficiency of 3D technologies
- AI-Driven Thermal Prediction for Enhanced Reliability in 3D HBM Chiplets