Sam Naffziger on Modular Design
Sam Naffziger, AMD SVP and Corporate Fellow, and Mark Papermaster, AMD CTO talk about chiplets. How you break up semiconductors into components that you can put together in novel ways and defy the slowing of Moore’s Law.
Related Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
Related Videos
- How AMD is re-thinking Chiplet Design
- Splitting the Die A Modular Approach to Chiplet Design and Verification
- Cadence & Samsung: Chiplet Ecosystem Innovation for Edge AI | CadenceLive 2026
- Thermal Comparison between Monolithic and Chiplet ASIC Design
Latest Videos
- Accelerating Chiplet SoC Development with Standards-Based Frameworks and Automated Design Flows
- Qualcomm's Tony Pialis on Dragonfly and the Data Movement Wall
- From silos to system: Sujit Sharan on the cultural and technical shift 3D IC demands
- Advancing 3DIC Technologies to Propel AI Innovations
- Building Real Confidence in Chiplet Stacks with Evelyn Landman of proteanTecs