How AMD is re-thinking Chiplet Design
Strix Halo Chip Deep-dive with a focus on AMD's next-gen die-to-die fan-out interconnect. How AMD is re-imagining Chiplet Design with ZEN 6.
Related Chiplet
- Optical Chiplet
- Reverse Gearbox Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
Related Videos
- Rethinking chip(let) design for next generation ADAS applications
- From Internal Designs to Open Chiplet Economy: Discussion on How to Create Open, Democratized Access to Chiplet Technology
- How Chiplets will Revolutionize the Electronic Design World
- Sam Naffziger on Modular Design
Latest Videos
- The European Chip Ecosystem
- Scaling up AI Compute, Memory and Connectivity
- CURIE: A Cycle-Accurate and Synthesizable UCIe Interface for the Agile Design and Co-Simulation of Chiplets
- Federated Chiplet Design and Simulation
- Custom HBM as a System: Co-designing the Base Die, Die to Die Power, and Package Thermals for AI Accelerators