Fast-Forward Verification: Scaling Chiplet Simulations with Xcelium
As chiplet-based designs grow in complexity, traditional simulation methods are hitting performance limits. Enter Cadence’s Xcelium Distributed Simulation App—a breakthrough that speeds up multi-die simulations by up to 3x. In this episode, we explore how distributed simulation is transforming verification workflows, enabling faster debug cycles, and helping teams meet aggressive tapeout schedules. We’ll break down how the technology works, where it fits in the verification flow, and what it means for the future of scalable, high-performance design.
Speakers:
- Anika Sunda, Director, Product Management, Cadence
- Sunil Kashide, Director, Chip Design Verification, Samsung Semiconductor India Research
- Prashant Teotia, Director, Product Engineering, Cadence
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