The Growing Chiplet Ecosystem: Collaboration, Innovation, and the Next Wave of UCIe™ Adoption
Chiplets are reshaping how advanced systems are designed, delivering new levels of performance, scalability, and flexibility. At the heart of this transformation, the UCIe™ (Universal Chiplet Interconnect Express™) specification is growing into the de facto standard that unites our ecosystem around a common, interoperable foundation.
In this webinar, UCIe Consortium members will discuss how UCIe 3.0’s expanding set of features is supporting a broader range of chiplet use cases and real-world implementations. Hear how companies are collaborating to advance adoption, streamline integration, and enable next-generation applications, from high-bandwidth memory to optical interconnects. The panelists will share insights into real-world collaborations, growing market momentum, and how the community is working together to make chiplet integration more accessible, flexible, and future-ready.
Whether you’re an engineer, technologist, or strategist following the evolution of open standards, this session will offer a real-time view into how UCIe is shaping the path forward for the chiplet ecosystem. Join us for an inside look at active UCIe chiplet member implementations and how you can get involved in chiplet collaboration.
Moderator: Brian Rea (UCIe Marketing Workgroup Co-Chair; Intel)
Panelists:
- Archana Cheruliyil (Alphawave Semi),
- Vishal Chandrasekar (Ayar Labs),
- Mayank Bhatnagar (Cadence),
- Justin Bunnell (Siemens),
- Manuel Mota (Synopsys)
Related Chiplet
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
Related Videos
- UCIe 2.0 Specification: Advancing an open ecosystem for on-package chiplet innovation
- Introducing the UCIe™ 3.0 Specification: Continued Innovations in the Open Chiplet Ecosystem
- Enabling an Open Chiplet Ecosystem with UCIe
- UCIe Based Chiplet Ecosystem Interoperable Testbench for Multi Vendor IP Integration
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