Reliability challenges in 3D IC semiconductor design
By John Ferguson - Director of Product Management, Siemens DIS
EETimes (November 28, 2023)
3D ICs represent an expansion of heterogeneous advanced package technology into the third dimension, presenting similar design to manufacturability challenges as 2D advanced packages along with additional complexities. While not yet widespread, the advent of chiplet standardization initiatives and the development of supporting tools are making 3D ICs more feasible and profitable for a broader range of players, including both large and small companies with smaller production runs.
The implementation of 3D ICs allows companies to divide a design into functional subcomponents and integrate the resulting IP at the most suitable process nodes. This facilitates low latency, high bandwidth data movement, reduced manufacturing costs, increased wafer yields, lower power consumption, and overall decreased expenses. These appealing advantages are driving significant growth and progress in advanced heterogeneous packaging and 3D IC technologies.
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related Technical Papers
- Mastering multi-physics effects in 3D IC design
- The multiphysics challenges of 3D IC designs
- Small Dies, Big Dreams: Challenges and Opportunities in Chiplet Commoditization
- Signal Integrity Challenges in Chiplet-Based Designs: Addressing Performance and Security
Latest Technical Papers
- Advances in waveguide to waveguide couplers for 3D integrated photonic packaging
- Lifecycle Cost-Effectiveness Modeling for Redundancy-Enhanced Multi-Chiplet Architectures
- DISTIL: A Distributed Spiking Neural Network Accelerator on 2.5D Chiplet Systems
- Multi-Partner Project: COIN-3D -- Collaborative Innovation in 3D VLSI Reliability
- EOTPR Fine Pitch Probing for Die-to-Die Interconnect Failure Analysis