Hybrid Bonding With Polymeric Interlayer Dielectric Layers Patterned by Nanoimprint Lithography
By Sungwoo Jeon; Sohwi Lee and Hyunsik Yoon
Seoul National University of Science and Technology, South Korea
Recent advancements in semiconductor technology have shifted the focus of innovation toward advanced packaging technologies featuring heterogeneous integration. Among these, hybrid bonding has garnered significant attention due to its potential for achieving higher integration density and reduced interconnect lengths. To alleviate thermal stress during high-temperature processes, polymeric interlayer dielectric (ILD) offers a promising solution owing to their compliant mechanical properties and strong bonding strength. In this work, we propose a simplified patterning method for polymeric dielectric layers based on thermal nanoimprint lithography (NIL). NIL enables the patterning of ILD layers using conventional polymers such as epoxy, as it does not require photoactive materials typically used in photolithography. In this study, a thermosetting epoxy resin based on diglycidyl ether of bisphenol A (DGEBA) was employed as the dielectric material. Using NIL followed by thermo-compression bonding, we achieved hybrid bonding with a 3μ m linewidth. The bonding strength of the Cu/epoxy interfaces was measured to lie between that of conventional Cu–Cu and epoxy–epoxy bonding, reflecting the dual contributions of metal diffusion and polymer crosslinking. These results demonstrate the feasibility of nanoimprint-based dielectric patterning for fine-pitch hybrid bonding and highlight its potential for high-density packaging and 3D integration, offering a viable alternative to traditional Through-Silicon Via (TSV)-based approaches.
To read the full article, click here
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related Technical Papers
- Network Design for Wafer-Scale Systems with Wafer-on-Wafer Hybrid Bonding
- Revamping the Semiconductor Industry with Hybrid Bonding
- Probing the Nanoscale Onset of Plasticity in Electroplated Copper for Hybrid Bonding Structures via Multimodal Atomic Force Microscopy
- Hybrid surface pre-treatments for enhancing copper-to-copper direct bonding
Latest Technical Papers
- AI-Driven Thermal Mapping and Management in 3D Integrated Photonic Circuits
- CLIP-3D: Closed-Loop Evaluation of Performance and Physical Constraints for 3D ICs
- StreamDQ: Near-Memory Weight DeQuantization in Custom HBM for Scalable AI Inference Acceleration
- HCRMap: Pressure-Aware Hot-Expert Residency Mapping for 3.5D MoE Chiplet Inference
- Chiplet3D: Pin- and Thermal-Aware 3D Chiplet Floorplanning via Convolution-Embedded MILP