High-Efficient and Fast-Response Thermal Management by Heterogeneous Integration of Diamond on Interposer-Based 2.5D Chiplets
By Ningning Xu 1, Dongchen Fan 1, Yixiong Wu 1, Zeming Tao 1, Delong Qiu 2 and Yi Zhong 1
1 School of Electronic Science and Engineering, Xiamen University, Xiamen, 361005, China.
2 Jiashan Fudan Institute, Zhejiang 314109, China
Abstract
Interposer-based 2.5D chiplets integration has emerged as a crucial technology for high-performance chip packaging and has played a pivotal role in advancements of artificial intelligence (AI) in recent years. However, the rapid increase in packaging and power density of 2.5D interposers presents significant challenges for thermal management. This study proposes a thermal management strategy for interposer-based 2.5D chiplets through the heterogeneous integration of a diamond heat spreader, demonstrating high efficiency and fast response. Both single-chip and multi-chiplet scenarios are evaluated to assess the cooling effectiveness of diamond heat spreader. The effects of power density, chip thickness, chiplet spacing, and structural configuration on thermal management are analyzed. The results demonstrate the superior thermal performance of the diamond-integrated structure, which reduces the maximum junction temperature by over 20 °C under high power density. The thermal impedance of the proposed structure is approximately 0.023 °C/W, which is significantly lower than the reported values. Furthermore, the proposed structure exhibits a rapid transient response and enhances thermal management under pulsed heat conditions. This research offers new insights and effective solutions for thermal management in advanced chiplets packaging.
Keywords: 2.5D chiplet packaging, heterogeneous integration, diamond heat spreader, Thermal management, thermal impedance
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related Technical Papers
- STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration
- Workflows for tackling heterogeneous integration of chiplets for 2.5D/3D semiconductor packaging
- Five Workflows for Tackling Heterogeneous Integration of Chiplets for 2.5D/3D
- THERMOS: Thermally-Aware Multi-Objective Scheduling of AI Workloads on Heterogeneous Multi-Chiplet PIM Architectures
Latest Technical Papers
- Advances in waveguide to waveguide couplers for 3D integrated photonic packaging
- Lifecycle Cost-Effectiveness Modeling for Redundancy-Enhanced Multi-Chiplet Architectures
- DISTIL: A Distributed Spiking Neural Network Accelerator on 2.5D Chiplet Systems
- Multi-Partner Project: COIN-3D -- Collaborative Innovation in 3D VLSI Reliability
- EOTPR Fine Pitch Probing for Die-to-Die Interconnect Failure Analysis