Multi-Partner Project: COIN-3D -- Collaborative Innovation in 3D VLSI Reliability

By George Rafael Gourdoumanis ^†, Fotoini Oikonomou ^†, Maria Pantazi-Kypraiou ^†, Pavlos Stoikos ^†, Olympia Axelou ^†, Athanasios Tziouvaras ^†, Georgios Karakonstantis ^†, Tahani Aladwani ⁺, Christos Anagnostopoulos ⁺, Yixian Shen ^‡, Anuj Pathania ^‡, Alberto Garcia-Ortiz ^*, and George Floros ^†§
† Department of Electrical and Computer Engineering, University of Thessaly, Greece
⁺ School of Computing Science, University of Glasgow, UK
^‡ University of Amsterdam, The Netherlands
^* Institute of Electrodynamics and Microelectronics, University of Bremen, Germany
^§ Department of Electronic and Electrical Engineering, Trinity College Dublin, Ireland

Abstract

As semiconductor manufacturing advances from the 3-nm process toward the sub-nanometer regime and transitions from FinFETs to gate-all-around field-effect transistors (GAAFETs), the resulting complexity and manufacturing chal lenges continue to increase. In this context, 3D chiplet-based approaches have emerged as key enablers to address these limitations while exploiting the expanded design space. Specifically, chiplets help address the lower yields typically associated with large monolithic designs. This paradigm enables the modular design of heterogeneous systems consisting of multiple chiplets (e.g., CPUs, GPUs, memory) fabricated using different technology nodes and processes. Consequently, it offers a capable and cost effective strategy for designing heterogeneous systems.

This paper introduces the Horizon Europe Twinning project COIN-3D (Collaborative Innovation in 3D VLSI Reliability), which aims to strengthen research excellence in 2.5D/3D VLSI systems reliability through collaboration between leading European institutions. More specifically, our primary scientific goal is the provision of novel open-source Electronic Design Automation (EDA) tools for reliability assessment of 3D systems, integrating advanced algorithms for physical- and system-level reliability analysis.

Index Terms — 3D VLSI, Chiplets, EDA Tools, Physical Design Methodologies, Architectural Exploration, Reliability

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