Advanced Chiplet Placement and Routing Optimization considering Signal Integrity
By Haeyeon Kim, Junghyun Lee, Seonguk Choi, Federico Berto, Taein Shin, Joonsang Park, Jihun Kim, Jiwon Yoon, Byeongmok Kim, Youngwoo Kim, and Joungho Kim
Abstract:
This article addresses the critical challenges of chiplet placement and routing optimization in the era of advanced packaging and heterogeneous integration. We present a novel approach that formulates the problem as a signal integrity-aware hierarchical Markov decision process (MDP), leveraging the place-to-route (P2R) algorithm. Our method uniquely incorporates the universal chiplet interconnect express (UCIe) eye mask specifications to ensure compliance with datarate-dependent signal integrity requirements. Tested on 10 benchmark problems, P2R achieved superior results with an average eye-diagram aperture of 0.869 unit interval (UI) in a single iteration, outperforming random search and deep reinforcement learning by 44.8%. By addressing the combinatorial complexity and hard constraints inherent in chiplet-based designs, this approach enables optimization while ensuring compliance with industry standards. Our work represents a significant advancement in optimizing heterogeneous integrated systems, addressing challenges that conventional placement and routing methods cannot adequately solve.
To read the full article, click here
Related Chiplet
- High Performance Droplet
- Interconnect Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Bridglets
- Automotive AI Accelerator
Related Technical Papers
- Signal Integrity Challenges in Chiplet-Based Designs: Addressing Performance and Security
- Tiny Chiplets Enabled by Packaging Scaling: Opportunities in ESD Protection and Signal Integrity
- Intel Delivers Cutting-Edge Process Technologies to the Data Center with Intel 18A and Advanced Chiplet Packaging
- Achieving Better Chiplet Design Signal Integrity with UCIe™
Latest Technical Papers
- Thermo-mechanical co-design of 2.5D flip-chip packages with silicon and glass interposers via finite element analysis and machine learning
- High-Efficient and Fast-Response Thermal Management by Heterogeneous Integration of Diamond on Interposer-Based 2.5D Chiplets
- HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement
- A physics-constrained and data-driven approach for thermal field inversion in chiplet-based packaging
- Probing the Nanoscale Onset of Plasticity in Electroplated Copper for Hybrid Bonding Structures via Multimodal Atomic Force Microscopy