Workload-Specific Hardware Accelerators
Workload-specific hardware accelerators are becoming essential in large data centers for two reasons. One is that general-purpose processing elements cannot keep up with the workload demands or latency requirements. The second is that they need to be extremely efficient due to limited electricity from the grid and the high cost of cooling these devices. Sharad Chole, chief scientist and co-founder of Expedera, talks with Semiconductor Engineering about the role of neural processing units inside AI data centers, tradeoffs between performance and accuracy, and new challenges with chiplet-based multi-die assemblies.
Related Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
Related Videos
- Compression Enabled MRAM Memory Chiplet Subsystems for LLM Inference Accelerators
- Blueprint for AI Hardware But with Instructions: Pre-Validated Chiplet Building Blocks
Latest Videos
- Advanced Packaging: Enabling AI at Scale
- Accelerating Chiplet Design with OCP Standards Compliant Chiplet Framework and Automation
- Chiplet Identity and Roots of Trust in FCSA Systems: An Architecture-Agnostic Security View
- From Transistors to AI: The Chiplet Revolution with Ramune Nagisetty
- Scaling AI with Chiplets & CPO