MIPI Debug Webinar Series: A Preview of MIPI Debug Over UCIe
UCIe™ (Universal Chiplet Interconnect Express™) is an open specification that defines the interconnect between chiplets within a System-In-Package (SiP), enabling an open chiplet ecosystem and ubiquitous interconnect at the package level.
To support this initiative, MIPI will extend its MIPI "Debug Over" family of specifications to include the UCIe transport. Targeted for completion in 2026, the new specification will enable the debugging of UCIe chiplets that are addressable over a UCIe-based topology within a SiP. The specification will leverage UCIe defined Management Transport infrastructure for debugging UCIe chiplets using MIPI defined standard debug protocols such as MIPI SneakPeek Protocol (SPP℠), MIPI System Trace Protocol (STP℠), and MIPI Trace Wrapper Protocol (TWP℠).
This presentation provides a preview of the forthcoming specification, explaining how it will support debug over UCIe in various Debug and Test System (DTS) and Target System (TS) configurations. It covers the detection, configuration, and collection of debug data from the UCIe chiplets in a SiP.
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