Keysight EDA Chiplet PHY Designer Demo

In this comprehensive demonstration, we delve into the steps of setting up Chiplet simulations, utilizing die-to-die interconnect E.M. models, and analyzing the resulting eye diagrams against the UCIe eye mask.

Key Highlights:

• Chiplet Simulation Setup:
  • Follow along as we navigate the Chiplet PHY Designer palette, placing essential components for Chiplet setup and simulation. Discover how to easily configure parameters such as standards, data rates, and package types.
• E.M. Simulation Integration:
  • Learn how to integrate E.M. simulation results into Chiplet simulations with the Post-layout component.
• Smart Connection Setup:
  • Experience the simplicity of connecting with Chiplet PHY Designer. Utilize the wiring feature to connect components quickly, reducing setup time significantly.
• Eye Simulation and Verification:
  • Compare simulated eyes against the UCIe eye mask. See how Chiplet PHY Designer facilitates efficient eye analysis.
• Voltage Transfer Function (VTF) Analysis:
  • Transition from eye simulation to VTF analysis, configuring the VTF setup with a few clicks.
• Crosstalk and Loss Analysis:
  • Gain insights into VTF crosstalk and loss analysis by comparing the channel VTF loss, and crosstalk to limit lines. 

Chiplet PHY Designer empowers engineers to design and optimize chiplet-based systems with confidence.