Agile Silicon Will Open Chiplet Architectures Keep Pace with Fast-Evolving AI Dataflows

Luisa Gonzalez-Guerrero, Research Scientist, Lawrence Berkeley National Laboratory

Chiplet-based architectures create new opportunities for system optimization while increasing design complexity. Engineers must evaluate tradeoffs across architecture, packaging, power delivery, thermal performance, manufacturability, testability, and software interactions. Traditional methodologies struggle to efficiently explore these multidimensional design spaces. This presentation examines emerging applications of AI throughout the chiplet development lifecycle, including architecture exploration, package optimization, interconnect planning, power and thermal prediction, design-space exploration, digital twins, verification acceleration, and design closure. The session discusses both the opportunities and limitations of AI-assisted engineering workflows and how AI can augment engineering expertise. The goal is to stimulate discussion around AI-native methodologies that can accelerate development and improve outcomes for heterogeneous semiconductor systems.