Advanced Packaging: Enabling AI at Scale

Presenter: CP Hung,  Vice President of Corporate R&D, ASE

The future of AI infrastructure will not be defined by silicon alone. As AI workloads drive unprecedented demand in hyperscale data centers and high-performance computing (HPC), advanced packaging has become a critical enabler of system performance, energy efficiency, and scalability. Heterogeneous integration, chiplets, and advanced packaging technologies are bringing together compute, memory, and high-speed interconnects to overcome bandwidth, power, and thermal challenges that increasingly define next-generation AI platforms.During his keynote, CP Hung will explore how breakthroughs in heterogeneous integration, chiplets, and advanced manufacturing are transforming bold AI ambitions into deployable systems. He will discuss how advanced packaging is enabling the AI infrastructure behind hyperscale data centers and HPC, and why future AI leadership will depend not only on compute performance, but on the ability to integrate and manufacture complex systems at scale.