Fast and Accurate Jitter Modeling for Statistical BER Analysis for Chiplet Interconnect and Beyond
By Shenggao Li and Maher Amer (TSMC)
Abstract:
In this paper, we investigate Statistical Bit Error Rate (BER) analysis for low-loss short-reach chiplet interface and high-loss long-reach serial interface. We used jitter filtering to account for the residue jitter not tracked by a forwarded clock system and proposed a fast and exact Statistical BER method to account for the Tx jitter amplification effect in a high-loss channel. Our proposed method achieves a linear computation complexity.
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