Ready to Level-up your SOC/Chiplet Design? : Optimizing the IP-driven Approach
By Prathna Sekar, Keysight Design Software
Keysight’s IP and Data Management group talks about using its solutions to optimize SOC and chiplet design methodologies with IP-driven development.
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related Videos
- Thermal Comparison between Monolithic and Chiplet ASIC Design
- How Chiplets will Revolutionize the Electronic Design World
- Multi-Die Systems Set the Stage for Innovation
- Paving the way for the Chiplet Ecosystem
Latest Videos
- Driving the Future of Automotive Compute with UCIe
- A Physics-Informed Neural Network Surrogate for Runtime PDN and Dynamic Droop Prediction in 2.5-D Chiplet Integration
- A Chiplet Interface Model for System-Level PPA Exploration
- Zero trust in silicon: The new security imperative for chiplet-based 3D ICs
- Beyond the data pipe: Why connectivity IP is now the system-critical layer in every 3D IC