Scaling 3D IC technologies: from niche to mainstream
As compute demands exponentially increase to power AI-based applications, the urgency for effective chiplet integration solutions has reached an inflection point. Currently, 2.5D and 3D heterogeneous integration technologies remain largely confined to a select group of vertically integrated hyperscaler companies. With mounting scaling challenges and cost pressures across the semiconductor industry, a growing number of companies are evaluating 3D IC architectures as viable alternatives to advanced node monolithic designs. This raises a pivotal question: Is the 3D IC ecosystem prepared to scale from its current limited deployment to a broad, accessible marketplace?
This panel examines the application domains poised to benefit most from 3D IC technologies and identifies the technical, economic, and ecosystem barriers impeding widespread adoption. We assess the actual market demand for chiplet-based solutions and evaluate industry initiatives to establish the standards, interfaces, and best practices necessary for creating an open and thriving chiplet ecosystem.
Moderator:
- Ed Sperling, Semiconductor Engineering
Panelists:
- Jeff Cain, Chipletz
- Letizia Giuliano, Alphawave Semi
- Lalitha Immaneni, Intel
- Subi Kengeri, Applied Materials
- Deepak Kulkarni, AMD
- Tony Mastroianni, Siemens EDA
Related Chiplet
- Optical Chiplet
- Reverse Gearbox Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
Related Videos
- The Siemens SIPI approach: From feasibility to final closure in 3D IC design
- From 2.5D to true 3D IC: What's driving the next wave of integration
- From chips to silicon destiny: The next wave of 3D IC
- From silos to system: Sujit Sharan on the cultural and technical shift 3D IC demands
Latest Videos
- The European Chip Ecosystem
- Scaling up AI Compute, Memory and Connectivity
- CURIE: A Cycle-Accurate and Synthesizable UCIe Interface for the Agile Design and Co-Simulation of Chiplets
- Federated Chiplet Design and Simulation
- Custom HBM as a System: Co-designing the Base Die, Die to Die Power, and Package Thermals for AI Accelerators