PCIe Technology and Chiplets
In this video, PCI-SIG member Rommel Camillo of Kandou discusses how PCIe technology is used in chiplets.
Related Chiplet
- Optical Chiplet
- Reverse Gearbox Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
Related Videos
- Arm Viewpoints: Chiplets explained – the technology and economics behind the next wave of silicon innovation
- How to accelerate innovation in IC technology with chiplets and 3D ICs
- IBM Research: Benefits and challenges of Chiplets
- Getting Moore with Less: How Chiplets and Open Interconnect Accelerate Cloud-Optimized AI Silicon
Latest Videos
- Scaling up AI Compute, Memory and Connectivity
- CURIE: A Cycle-Accurate and Synthesizable UCIe Interface for the Agile Design and Co-Simulation of Chiplets
- Federated Chiplet Design and Simulation
- Custom HBM as a System: Co-designing the Base Die, Die to Die Power, and Package Thermals for AI Accelerators
- Bunch of Wires Flexi 1.0: a low-cost, low power D2D interface