Emerging Technologies Driving Heterogeneous Integration
As chips are disaggregated into chiplets, more features are being added into these devices that chipmakers were unable to include in the past due to reticle size limits and the high cost of scaling everything to the latest process node. This has opened the door to new architectures, new materials such as glass substrates, and a variety of new challenges.
Dick Otte, president and CEO of Promex Industries, talks with Semiconductor Engineering about warpage, through-glass vias, an increase in analog components, photonic ICs, and other trends, features, and challenges that engineers need to consider in future designs.
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related Videos
- Multi-Chiplet Heterogeneous Integration Packaging for Semiconductor System
- Blue Cheetah BlueLynx for Heterogeneous Integration: 16 Gbps Chiplet Interconnect IP for UCIe & BoW
- Revolutionizing System Design: Impact of Chiplets and Heterogeneous Integration on AI Server
- Impact of Chiplets, Heterogeneous Integration and Modularity on AI and HPC systems
Latest Videos
- The Evolution Of UCIe
- Blueprint for AI Hardware But with Instructions: Pre-Validated Chiplet Building Blocks
- Standardizing System-Level Interoperability for Multi-Vendor Chiplets
- Towards wafer-scale optical interconnect relying on Silicon Photonics and advanced 3D assembly
- Pre-Silicon Chiplet Verification for Datacenters