Hardware Trojan Threats to Multi-Chiplet Photonic Neural Network Accelerators
By Sudeep Pasricha
Department of Electrical and Computer Engineering, Colorado State University

Abstract
Multi-chiplet photonic neural network accelerators (MCPNAs) combine photonic computation, photonic communica-tion, and heterogeneous chiplet integration to enable scalable and energy-efficient AI acceleration. However, their distributed archi-tecture and reliance on third-party chiplets introduce significant hardware security risks. This paper examines Hardware Trojan (HT) threats to MCPNAs across three dimensions: confidentiality, integrity, and availability.
Index Terms—Multi-chiplet systems, silicon photonics, network-on-interposer, hardware security, AI acceleration.
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