IC-ThermBench: An Open, Progressive Benchmark for Generalizable 2.5D/3D-IC Thermal Learning
By David Huang 1, Wenkai Yang 2, Kuiye Ding 1, Haiyang Xin 3
1 University of Technology Sydney, Australia
2 School of Information Science and Technology, ShanghaiTech University, Shanghai, China
3 Technische Universität München, Munich, Germany

Abstract
Standardized benchmarks are fundamental to reliable progress in AI for EDA, including learning-based thermal modeling. However, existing thermal prediction studies often rely on different datasets, simulators, data splits, preprocessing pipelines, and metrics, while most datasets and implementations remain unavailable, making fair and reproducible comparison difficult. We introduce IC-ThermBench, an open and progressive benchmark that combines established 3D-IC steady-state, transient, and industrial package tasks with a new 50,000-sample 2.5D chiplet extension designed to evaluate progressively broader represented physical variation and cross-package OOD transfer. Five Generalization Scopes cover 3D-IC fixed-design prediction, Within-Family Generalization under layout, material, and boundary-condition variation, and Cross-Package OOD transfer to unseen package systems.
We evaluate eight representative baselines under common data, splits, labels, and metrics. Performance degrades gradually from S2 to S4 as represented physical support broadens, but Cross-Package OOD produces a much sharper degradation: the best RMSE and MAE increase from 1.216 and 0.938~K at S4 to 15.99 and 15.00~K at S5, respectively. With only 10 labeled samples per OOD case, target-domain adaptation reduces the best MAE to 2.60~K. IC-ThermBench further provides a unified generation, training, inference, and evaluation pipeline, enabling reproducible and fair comparison of existing and new thermal predictor. Project site: https://github.com/Day333/ThermalBench.
Keywords: thermal benchmark, public dataset, chiplets, 2.5D/3D integration, neural operators, out-of-distribution generalization
To read the full article, click here
Related Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
Related Technical Papers
- DeepOHeat-v1: Efficient Operator Learning for Fast and Trustworthy Thermal Simulation and Optimization in 3D-IC Design
- TDPNavigator-Placer: Thermal- and Wirelength-Aware Chiplet Placement in 2.5D Systems Through Multi-Agent Reinforcement Learning
- Self-Attention to Operator Learning-based 3D-IC Thermal Simulation
- Multi-Chiplet Marvels: Exploring Chip-Centric Thermal Analysis
Latest Technical Papers
- Location-Aware Caching Mechanism for minimizing performance degradation induced by inefficient inter-chiplet data path
- Predicting Cure Evolution and Thermal Endurance of a Highly Filled Epoxy Underfill for Advanced Packaging
- A Unified Interconnection Network for Chiplet-Based Scaling of the BrainScaleS Neuromorphic System
- Fengshui: Demystifying Chiplet Ecosystem and Bespoke Neural Network Accelerator Codesign
- Hardware Trojan Threats to Multi-Chiplet Photonic Neural Network Accelerators