The NoC In 3D Space
The network on chip has become essential for complex designs, but it needs to evolve to support 3D designs and enable the integration of chiplets.
By Brian Bailey, SemiEngineering
A network on chip (NoC) has become an essential piece of technology that enables the complexity of chips to keep growing, but when designs go 3D, or when third-party chiplets become pervasive, it’s not clear how NoCs will evolve or what the impact will be on chiplet architectures.
A NoC enables data to move between heterogeneous computing elements, while at the same time minimizing the resources required to connect them. Tradeoffs can be made about the topology of a NoC, the resources consumed, and the latency associated with traffic for a defined bandwidth. A NoC also can help keeping data coherent between distributed computing elements.
To read the full article, click here
Related Chiplet
- High Performance Droplet
- Interconnect Chiplet
- 12nm EURYTION RFK1 - UCIe SP based Ka-Ku Band Chiplet Transceiver
- Bridglets
- Automotive AI Accelerator
Related News
- TSMC Announces Breakthrough Set to Redefine the Future of 3D IC
- UMC Launches W2W 3D IC Project with Partners, Targeting Growth in Edge AI
- CEA Combines 3D Integration Technologies & Many-Core Architectures to Enable High-Performance Processors That Will Power Exascale Computing
- Synopsys looks to AI, 3D die for trillion transistor designs
Latest News
- Cadence Launches Partner Ecosystem to Accelerate Chiplet Time to Market
- Ambiq and Bravechip Cut Smart Ring Costs by 85% with New Edge AI Chiplet
- TI accelerates the shift toward autonomous vehicles with expanded automotive portfolio
- Where co-packaged optics (CPO) technology stands in 2026
- Qualcomm Completes Acquisition of Alphawave Semi