Samsung Electronics To Provide Turnkey Semiconductor Solutions With 2nm GAA process and 2.5D Package to Preferred Networks
Collaboration with leading Japanese AI company will produce cutting-edge AI accelerator chips
SEOUL, South Korea — July 9, 2024 — Samsung Electronics Co., Ltd., a world leader in advanced semiconductor technology, today announced that it will provide turnkey semiconductor solutions using the 2-nanometer (nm) foundry process and the advanced 2.5D packaging technology Interposer-Cube S (I-Cube S) to Preferred Networks, a leading Japanese AI company.
By leveraging Samsung’s leading-edge foundry and advanced packaging products, Preferred Networks aims to develop powerful AI accelerators that meet the ever-growing demand for computing power driven by generative AI.
Since starting mass production of the industry’s first 3nm process node applying Gate-All-Around (GAA) transistor architecture, Samsung has strengthened its GAA technology leadership by successfully winning orders for the 2nm process with further upgrades in performance and power efficiency.
The cooperation with Preferred Networks marks the first achievement for Japanese companies in the field of large-sized heterogeneous integrated package technologies and Samsung plans to accelerate its leading global advanced package market offensive.1
The 2.5D Advanced Package I-Cube S technology included in the turnkey solutions, is a heterogeneous integration package technology, with multiple chips in one package to enhance inter-connection speed and reduce package size. The use of the silicon interposer (Si-interposer) is crucial in achieving ultra-fine redistribution layer (RDL) and stabilizing power integrity for optimal semiconductor performance. GAONCHIPS, a specialized system semiconductor development company, designed the chip.
"We are excited to lead in AI accelerator technology with Samsung Electronics’ 2nm GAA process. This solution will significantly support Preferred Networks’ ongoing efforts to build highly energy-efficient, high-performance computing hardware that meets the ever-growing computing demands from generative AI technologies, especially large language models.,” said Junichiro Makino, VP and Chief Technology Officer (CTO) of Computing Architecture at Preferred Networks.
"This order is pivotal as it validates Samsung's 2nm GAA process technology and Advanced Package technology as an ideal solution for next-generation AI accelerators," said Taejoong Song, Corporate VP and the head of Foundry Business Development Team at Samsung Electronics. "We are committed to closely collaborating with our customers ensuring that the high performance and low power characteristics of our products are fully realized."
Preferred Networks, headquartered in Tokyo, develops advanced software and hardware technologies by vertically integrating the AI value chain from chips to supercomputers and generative AI foundation models. It provides solutions and products for various industries such as manufacturing, transportation, healthcare, entertainment, and education. The company is one of the major players in the global AI market, achieving first place three times in the past five years on the Green5002 list of supercomputers.
Based on this collaboration, Samsung and Preferred Networks plan to showcase groundbreaking AI chiplet solutions for the next-generation data center and generative AI computing market in the future.3
About Samsung Electronics Co., Ltd.
Samsung inspires the world and shapes the future with transformative ideas and technologies. The company is redefining the worlds of TVs, smartphones, wearable devices, tablets, home appliances, network systems, and memory, system LSI, foundry and LED solutions, and delivering a seamless connected experience through its SmartThings ecosystem and open collaboration with partners. For the latest news, please visit the Samsung Newsroom at news.samsung.com.
1 Heterogeneous integration packaging technology integrates different types of chips - such as memory, logic, and sensors - in a single package.
2 Green500: the ranking of the TOP500 supercomputers in the world based on their performance-per-watt efficiency
3 Chiplet Solution: A technology of assembling into a single package with other different chips performing different fuctions through the packaging technologies
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