Near-Packaged Optics (NPO) is an optical interconnect architecture in which optical engines are placed in close physical proximity to a switch ASIC, AI accelerator, CPU, GPU, or networking processor within the same system or package environment. The objective of NPO is to reduce the electrical trace length between high-speed silicon and optical transceivers, thereby improving bandwidth density, signal integrity, and power efficiency.

NPO is considered an intermediate architectural step between traditional pluggable optical transceivers and fully integrated Co-Packaged Optics (CPO) systems.

The technology is increasingly used in:

• AI infrastructure,
• hyperscale data centers,
• high-performance computing (HPC),
• Ethernet switching,
• and next-generation scale-out networking.

Background

As networking bandwidth has increased from:

• 100G,
• to 400G,
• 800G,
• 1.6T,
• and beyond,

traditional electrical interconnects based on copper traces and pluggable optics have encountered growing limitations in:

• signal loss,
• power consumption,
• PCB complexity,
• retimer requirements,
• and thermal management.

Modern AI clusters require massive interconnect bandwidth between:

• GPUs,
• AI accelerators,
• switches,
• and memory systems.

Electrical SerDes operating at 112G PAM4 and future 224G signaling increasingly suffer from insertion loss over long PCB traces. This has accelerated industry interest in bringing optics physically closer to the compute silicon.

Near-Packaged Optics emerged as a compromise architecture that provides many of the benefits of Co-Packaged Optics while avoiding some of the packaging and serviceability challenges of full optical co-packaging.

Architecture

General Concept

In an NPO system:

• the switch ASIC or accelerator remains packaged conventionally,
• while optical engines are mounted nearby on the same board, substrate, or interposer region.

Electrical connections between the ASIC and optics are significantly shortened compared to traditional pluggable modules.

Main Components

Switch ASIC or Accelerator

The primary compute or networking silicon device.

Examples:

• Ethernet switch ASICs,
• AI accelerators,
• GPUs,
• XPUs,
• HPC processors.

Optical Engines

Compact optical modules containing:

• photonic integrated circuits (PICs),
• modulators,
• photodetectors,
• laser interfaces,
• driver ICs,
• and transimpedance amplifiers (TIAs).

These engines often rely on:

• silicon photonics (SiPh),
• indium phosphide (InP),
• or hybrid photonic technologies.

Electrical Interfaces

High-speed electrical SerDes links connect the ASIC to the optical engine.

Typical signaling technologies include:

• 112G PAM4,
• 224G PAM4,
• future ultra-high-speed SerDes standards.

Fiber Connectivity

Optical fibers connect the optical engines to external network infrastructure.

Fiber attachment methods include:

• MPO connectors,
• fiber arrays,
• edge coupling,
• and grating couplers.

 

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