Working With Chiplets
Letizia Giuliano, vice president of IP product marketing and management at Alphawave Semi, talks with Semiconductor Engineering about the challenges of developing and integrating chiplets, where the likely problems arise, and how this differs from a homogeneous SoC.
The usual method of migrating to the next process node to cram more features onto a piece of silicon no longer works. It's too expensive, and too limited for most applications. The path forward is now heterogeneous chiplets targeted at specific markets, and while logic will continue to scale, other features are being separated out into chiplets developed using different process technologies. This already ishappening with high-bandwidth memory, and the next target is I/O.
Related Chiplet
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- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
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