What could back an open market for chiplets?
By Chris Edwards, New Electronics | November 18, 2025
For as long as the idea of the system-on-chip (SoC) has existed, the graphs of design and non-recurrent engineering costs have been reliably exponential in the wrong direction. Each successive process node just pushes the number even further into the stratosphere. The payoff was, naturally, you get more for your money in terms of silicon capability with each notch of the ratchet.
Then, even silicon became more expensive on a per-transistor basis. Not by much, but it deviated from the long-term trend of Moore’s Law. At the International Electron Device Meeting in 2023, Google chip-packaging chief Milind Shah placed the switch at 20nm, just ahead of the foundries’ move to finFETs.
Chipmakers companies like AMD could see this problem coming and began, as the finFET generations appeared, the move to chiplets. Dividing a large, all-encompassing SoC into multiple chiplets makes it possible to dedicate the most advanced silicon to the circuits that can take best advantage. For AMD, those were the x86 cores in its high-end processors. The I/O and memory controllers? Those can use more mature, more analogue-friendly and cheaper process nodes.
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related News
- YorChip announces Universal PHY™ PPA and introduces Open PHY to jumpstart broader market
- Avnet ASIC and Bar-Ilan University Launch Innovation Center for Next Generation Chiplets
- A methodology for turning an SoC into chiplets
- Chiplets Market to Reach USD 107.0 Billion by 2033; Amid Rising Demand for Advanced Semiconductor Solutions
Latest News
- Avicena Launches the World’s First microLED Optical Interconnect Evaluation Kit for AI Infrastructure Innovators
- Lightmatter Achieves Record 1.6 Tbps Per Fiber to Accelerate AI Optical Interconnect
- Arm Positions Neoverse for AI and Telco Networks at MWC
- NVIDIA Compute Architecture Paves the Way for Scale-Up Optical Interconnects; CPO Penetration in AI Data Centers Expected to Rise Steadily
- CEA-Leti and NcodiN Partner to Industrialize 300 mm Silicon Photonics for Bandwidth-Hungry AI Interconnects