TSMC to Provide 3DIC Integration for AI Chips in 2027, Featuring 12 HBM4 and Chiplets Manufactured with A16
By Trendforce (September 5, 2024)
Jun He, Vice President of Advanced Packaging Technology and Service at TSMC, stated that 3D IC is a crucial method for integrating AI chip memory with logic chips.
According to a report from TechNews, regarding the development of 2.5D CoWoS advanced packaging, which integrates eight chiplets, TSMC will use the A16 advanced process to manufacture the chiplets, and integrated them with 12 HBM4, which is expected to be launched in 2027.
Reportedly, in his speech at the Semicon Taiwan 2024 “3D IC / CoWoS for AI Summit,” He noted that the global semiconductor market is projected to become a trillion-dollar industry by 2030, with HPC and AI being the key drivers, accounting for 40% of the market, which also make AI chips crucial drivers for 3D IC packaging.
To read the full article, click here
Related Chiplet
- FlexGen Multi-Die Smart Network-on-Chip (NoC) IP
- Ncore Multi-Die Interconnect IP
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
Related News
- Cadence and TSMC Advance AI and 3D-IC Chip Design with Certified Design Solutions for TSMC’s A16 and N2P Process Technologies
- Understanding 3DIC, Heterogeneous Integration, SiP, and Chiplets at Once
- Chiplets: Piecing Together the Next Generation of Chips (Part I)
- Chiplets: Piecing Together the Next Generation of Chips (Part II)
Latest News
- Chiplets at the Edge: How Modular SoCs Redefine Performance Per Watt
- Visitech Launches 1-micron Maskless Photohead for Advanced Packaging
- GlobalFoundries reaches agreement to establish U.S.-based supply of silicon interposers for advanced AI packaging
- Applied Materials and Intel Collaborate to Accelerate Chipmaking Innovations for AI-Driven Computing
- BOS Semiconductors to Support MIRISE Technologies’ Automotive Chiplet R&D Project