AI and Chiplets Prominent at TSMC OIP 2025
By Majeed Ahmad, EETimes | September 26, 2025
The design tool offerings of the top three EDA houses showcased at TSMC’s annual U.S. event once more affirm the two defining trends in the current semiconductor landscape: artificial intelligence (AI) and chiplets. TSMC’s Open Innovation Platform (OIP) Ecosystem Forum brings together partners to demonstrate their design advancements of TSMC’s latest process nodes and packaging technologies.
The EDA trio’s announcements at the event encompass new AI flows and multi-die innovations relating to 3D IC, advanced packaging, and chiplets. The advancements in AI and chiplet realms are intertwined, paving the way for high-performance AI and HPC chips that serve compute-intensive workloads.
To read the full article, click here
Related Chiplet
- Integrated voltage regulator (IVR) chiplet
- High-performance connectivity chiplets
- eFPGA Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
Related News
- Alphawave Semi and Arm to Present on Chiplets for Architecting Next-Generation Terabit AI Networks at the TSMC OIP Ecosystem Forum North America
- Lorentz Solution Jointly Presents with NVIDIA on Large-Scale 3D Terahertz EM Simulation for Real IC/3DIC Silicon Case Studies in Photonic Switches at 2025 TSMC OIP
- Teradyne Awarded 2025 TSMC Open Innovation Platform® (OIP) Partner of the Year for TSMC 3DFabric® Testing
- TSMC plans automotive chiplet process for 2025
Latest News
- YorChip and Digitho announce UniPack Advanced Packaging
- Industry Leaders Formally Launch CPO System Architecture Initiative Within the Open Compute Project
- Point2 Completes $136M Series B Funding with Arm, LB Investment, and Maverick Silicon
- Multibeam Appoints Interim CFO Following $200M Funding Milestone
- Multibeam Signs $140 Million Letter of Intent with the U.S. Department of Commerce