The keeper of Moore’s Law
By Nick Flaherty, eeNews Europe (December 14, 2024)

IEDM is always eye opening for the advances of device technology. The 2024 meeting in San Francisco this week has not only shown the latest 2nm CMOS process technologies, but way beyond.
TSMC is discussing the technology for its A16 node at the end of 2026, while European researchers at imec have been showing, and making, the components for a standard cell with stacked CFET nanosheet transistors for A7 in the early 2030s.
While there used to be talk of the ‘end of Moore’s Law’ (and certainly the end of Dennard scaling) Intel has been pushing back.
“We continue to be the stewards of Moore’s Law for the industry,” said Sanjay Natarajan, SVP & GM of the Intel Technology Research Group, the newly renamed Components Research group. “We are releasing groundbreaking new technology,” he said. “We have in my opinion perhaps the strongest research development pipeline in the industry.”
He points to the combination of device technology, interconnect and packaging as vital to driving the technology forward.
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related News
- Is Chiplets the Answer to the End of Moore’s Law?
- Paving the way for the semiconductor future: The Chiplet Center of Excellence commences operations
- Automotive Meets Chiplets: Robert Bielby’s Perspective on the Impact of Level 3 ADAS on Emerging Semiconductor Tech
- The Basics of Chiplet Integration and Importance of Adhesive Solutions
Latest News
- Ayar Labs Closes $500M Series E, Accelerates Volume Production of Co-Packaged Optics
- NanoIC opens access to first-ever fine-pitch RDL and D2W hybrid bonding interconnect PDKs
- GUC Announces Tape-out of UCIe 64G IP on TSMC N3P Technology
- GLS and APES Announce Advanced Semiconductor Packaging Partnership
- Ayar Labs Names Sankara Venkateswaran as Vice President of Engineering